diff options
author | chai <chaifix@163.com> | 2019-12-15 16:45:17 +0800 |
---|---|---|
committer | chai <chaifix@163.com> | 2019-12-15 16:45:17 +0800 |
commit | 7da5ed50d803e94518fcb6acdd8083710e0eb77e (patch) | |
tree | 9f3655b5f8049cca4251dd5425930edb52f2dc3d | |
parent | bcb7c0a426e66dc57007ae9a0e879358c7860fbb (diff) |
*misc
-rw-r--r-- | src/core/clip.c | 4 | ||||
-rw-r--r-- | src/core/clip.h | 19 | ||||
-rw-r--r-- | src/core/device.c | 2 | ||||
-rw-r--r-- | src/core/rasterizer.c | 1 | ||||
-rw-r--r-- | src/core/shader.c | 80 | ||||
-rw-r--r-- | src/core/shader.h | 113 | ||||
-rw-r--r-- | src/example/03_texture.c | 3 | ||||
-rw-r--r-- | src/shaders/default.c | 6 | ||||
-rw-r--r-- | src/shaders/pbr.c | 31 | ||||
-rw-r--r-- | src/shaders/unlit.c | 9 |
10 files changed, 127 insertions, 141 deletions
diff --git a/src/core/clip.c b/src/core/clip.c index 1deb4ee..51321a8 100644 --- a/src/core/clip.c +++ b/src/core/clip.c @@ -87,7 +87,7 @@ static float get_intersect_ratio(Vec4* prev, Vec4* curr, Plane plane) { // if (varying_flag & VARYING_WEIGHT) ssrS_lerpvec4(t, &prev->vertex.weight, &curr->vertex.weight, &dst->vertex.weight); //*/ // } -// if (varying_flag & VARYING_EXTRA) { +// if (varying_flag & VARYING_ANY) { // int j = 0; // if (varying_flag & VARYING_NUM) { // for (j = 0; j < REG_NUM_COUNT; ++j) { @@ -185,7 +185,7 @@ bool clip_triangle(Vec4* c0, Vec4* c1, Vec4* c2, Vert* v0, Vert* v1, Vert* v2, u //#define INIT_CLIP_VERT(idx) \ // clip_buffer.vertices[idx].clip_coord = *c##idx; \ // clip_buffer.vertices[idx].vertex = *v##idx; \ -// if (varying_flag & VARYING_EXTRA) { \ +// if (varying_flag & VARYING_ANY) { \ // int i = 0; \ // if(varying_flag & VARYING_NUM) { \ // for (i = 0; i < REG_NUM_COUNT; ++i) { \ diff --git a/src/core/clip.h b/src/core/clip.h index c22bb8d..2ac733d 100644 --- a/src/core/clip.h +++ b/src/core/clip.h @@ -3,6 +3,7 @@ #include "../util/type.h" #include "vert.h" +#include "shader.h" #define LERP(t,a,b) ((1-(t))*(a)+(t)*(b)) @@ -11,13 +12,6 @@ typedef struct { Vec4 clip_coord; /*vertex data*/ Vert vertex; - /*register values*/ -/* - float num[4]; - Vec2 v2[6]; - Vec3 v3[8]; - Vec4 v4[6]; -*/ } ClippedVert; #define CLIP_BUFFER_SIZE 6 @@ -26,17 +20,14 @@ typedef struct { ClippedVert vertices[CLIP_BUFFER_SIZE]; uint count; /*temp register*/ - float temp_reg_num[4][CLIP_BUFFER_SIZE]; - Vec2 temp_reg_v2[6][CLIP_BUFFER_SIZE]; - Vec3 temp_reg_v3[8][CLIP_BUFFER_SIZE]; - Vec4 temp_reg_v4[6][CLIP_BUFFER_SIZE]; + float temp_reg_num[REG_NUM_COUNT][CLIP_BUFFER_SIZE]; + Vec2 temp_reg_v2[REG_V2_COUNT][CLIP_BUFFER_SIZE]; + Vec3 temp_reg_v3[REG_V3_COUNT][CLIP_BUFFER_SIZE]; + Vec4 temp_reg_v4[REG_V4_COUNT][CLIP_BUFFER_SIZE]; } ClippedBuffer; ClippedBuffer clip_buffer; -typedef void* (*BcpInterpolator)(Vec3* bc, void* a, void* b, void* c, void* out); -typedef void* (*LinearInterpolator)(float t, void* a, void* b, void* c, void* out); - bool clip_triangle(Vec4* c0, Vec4* c1, Vec4* c2, Vert* v0, Vert* v1, Vert* v2, uint varying_flag, ClippedBuffer* clipped); uint clip_line(); diff --git a/src/core/device.c b/src/core/device.c index 4b16d32..aa83cfe 100644 --- a/src/core/device.c +++ b/src/core/device.c @@ -439,7 +439,7 @@ void ssr_draw(ssr_PrimitiveType primitive) { state.uniforms.mv = &mv; uint varying_flag = state.program->varying_flag; - bool use_extra_varyings = (varying_flag & VARYING_EXTRA) != 0; + bool use_extra_varyings = (varying_flag & VARYING_ANY) != 0; /*prepare registers if necessary*/ if (use_extra_varyings) { diff --git a/src/core/rasterizer.c b/src/core/rasterizer.c index 4f23f52..ba88161 100644 --- a/src/core/rasterizer.c +++ b/src/core/rasterizer.c @@ -150,7 +150,6 @@ void ssrR_triangle( Vec4* CA, Vec4* CB, Vec4* CC, Vert* A, Vert* B, Vert* C, Pro discardif(!ssr_testdepth(p.x, p.y, depth)); \ } \ /*set varying variables*/ \ - ssrS_solveprops(varying_flag, &bc, A, B, C); \ ssrS_solveregs(&bc, A->index, B->index, C->index); \ /*enter fragment shader*/ \ if(program->fragmentshader(uniforms, &ssr_frag_in, &color)) { \ diff --git a/src/core/shader.c b/src/core/shader.c index 86c2ad6..d7ef26f 100644 --- a/src/core/shader.c +++ b/src/core/shader.c @@ -14,6 +14,8 @@ Vec2* reg_v2_02; Vec2* reg_v2_03; Vec2* reg_v2_04; Vec2* reg_v2_05; +Vec2* reg_v2_06; +Vec2* reg_v2_07; Vec3* reg_v3_00; Vec3* reg_v3_01; @@ -23,6 +25,10 @@ Vec3* reg_v3_04; Vec3* reg_v3_05; Vec3* reg_v3_06; Vec3* reg_v3_07; +Vec3* reg_v3_08; +Vec3* reg_v3_09; +Vec3* reg_v3_10; +Vec3* reg_v3_11; Vec4* reg_v4_00; Vec4* reg_v4_01; @@ -30,6 +36,8 @@ Vec4* reg_v4_02; Vec4* reg_v4_03; Vec4* reg_v4_04; Vec4* reg_v4_05; +Vec4* reg_v4_06; +Vec4* reg_v4_07; extern FragmentShaderIn ssr_frag_in; @@ -39,14 +47,18 @@ Register registers[REG_TOTAL] = { { 0, REGTYPE_NUM, sizeof(float), NULL }, { 0, REGTYPE_NUM, sizeof(float), NULL }, { 0, REGTYPE_NUM, sizeof(float), NULL }, - /*6 vec2 registers*/ + /*8 vec2 registers*/ { 0, REGTYPE_VEC2, sizeof(Vec2), NULL }, { 0, REGTYPE_VEC2, sizeof(Vec2), NULL }, { 0, REGTYPE_VEC2, sizeof(Vec2), NULL }, { 0, REGTYPE_VEC2, sizeof(Vec2), NULL }, { 0, REGTYPE_VEC2, sizeof(Vec2), NULL }, { 0, REGTYPE_VEC2, sizeof(Vec2), NULL }, - /*8 vec3 registers*/ + { 0, REGTYPE_VEC2, sizeof(Vec2), NULL }, + { 0, REGTYPE_VEC2, sizeof(Vec2), NULL }, + /*12 vec3 registers*/ + { 0, REGTYPE_VEC3, sizeof(Vec3), NULL }, + { 0, REGTYPE_VEC3, sizeof(Vec3), NULL }, { 0, REGTYPE_VEC3, sizeof(Vec3), NULL }, { 0, REGTYPE_VEC3, sizeof(Vec3), NULL }, { 0, REGTYPE_VEC3, sizeof(Vec3), NULL }, @@ -55,7 +67,11 @@ Register registers[REG_TOTAL] = { { 0, REGTYPE_VEC3, sizeof(Vec3), NULL }, { 0, REGTYPE_VEC3, sizeof(Vec3), NULL }, { 0, REGTYPE_VEC3, sizeof(Vec3), NULL }, - /*6 vec4 registers*/ + { 0, REGTYPE_VEC3, sizeof(Vec3), NULL }, + { 0, REGTYPE_VEC3, sizeof(Vec3), NULL }, + /*8 vec4 registers*/ + { 0, REGTYPE_VEC4, sizeof(Vec4), NULL }, + { 0, REGTYPE_VEC4, sizeof(Vec4), NULL }, { 0, REGTYPE_VEC4, sizeof(Vec4), NULL }, { 0, REGTYPE_VEC4, sizeof(Vec4), NULL }, { 0, REGTYPE_VEC4, sizeof(Vec4), NULL }, @@ -70,14 +86,16 @@ ActiveReg active_regs[REG_TOTAL] = { { sizeof(float), NULL, ®_num_01, ssrS_bcpnum, &ssr_frag_in.num[1] }, { sizeof(float), NULL, ®_num_02, ssrS_bcpnum, &ssr_frag_in.num[2] }, { sizeof(float), NULL, ®_num_03, ssrS_bcpnum, &ssr_frag_in.num[3] }, - /*6 vec2 registers*/ + /*8 vec2 registers*/ { sizeof(Vec2), NULL, ®_v2_00, ssrS_bcpvec2, &ssr_frag_in.v2[0] }, { sizeof(Vec2), NULL, ®_v2_01, ssrS_bcpvec2, &ssr_frag_in.v2[1] }, { sizeof(Vec2), NULL, ®_v2_02, ssrS_bcpvec2, &ssr_frag_in.v2[2] }, { sizeof(Vec2), NULL, ®_v2_03, ssrS_bcpvec2, &ssr_frag_in.v2[3] }, { sizeof(Vec2), NULL, ®_v2_04, ssrS_bcpvec2, &ssr_frag_in.v2[4] }, { sizeof(Vec2), NULL, ®_v2_05, ssrS_bcpvec2, &ssr_frag_in.v2[5] }, - /*8 vec3 registers*/ + { sizeof(Vec2), NULL, ®_v2_06, ssrS_bcpvec2, &ssr_frag_in.v2[6] }, + { sizeof(Vec2), NULL, ®_v2_07, ssrS_bcpvec2, &ssr_frag_in.v2[7] }, + /*12 vec3 registers*/ { sizeof(Vec3), NULL, ®_v3_00, ssrS_bcpvec3, &ssr_frag_in.v3[0] }, { sizeof(Vec3), NULL, ®_v3_01, ssrS_bcpvec3, &ssr_frag_in.v3[1] }, { sizeof(Vec3), NULL, ®_v3_02, ssrS_bcpvec3, &ssr_frag_in.v3[2] }, @@ -86,42 +104,48 @@ ActiveReg active_regs[REG_TOTAL] = { { sizeof(Vec3), NULL, ®_v3_05, ssrS_bcpvec3, &ssr_frag_in.v3[5] }, { sizeof(Vec3), NULL, ®_v3_06, ssrS_bcpvec3, &ssr_frag_in.v3[6] }, { sizeof(Vec3), NULL, ®_v3_07, ssrS_bcpvec3, &ssr_frag_in.v3[7] }, - /*6 vec4 registers*/ + { sizeof(Vec3), NULL, ®_v3_08, ssrS_bcpvec3, &ssr_frag_in.v3[8] }, + { sizeof(Vec3), NULL, ®_v3_09, ssrS_bcpvec3, &ssr_frag_in.v3[9] }, + { sizeof(Vec3), NULL, ®_v3_10, ssrS_bcpvec3, &ssr_frag_in.v3[10] }, + { sizeof(Vec3), NULL, ®_v3_11, ssrS_bcpvec3, &ssr_frag_in.v3[11] }, + /*8 vec4 registers*/ { sizeof(Vec4), NULL, ®_v4_00, ssrS_bcpvec4, &ssr_frag_in.v4[0] }, { sizeof(Vec4), NULL, ®_v4_01, ssrS_bcpvec4, &ssr_frag_in.v4[1] }, { sizeof(Vec4), NULL, ®_v4_02, ssrS_bcpvec4, &ssr_frag_in.v4[2] }, { sizeof(Vec4), NULL, ®_v4_03, ssrS_bcpvec4, &ssr_frag_in.v4[3] }, { sizeof(Vec4), NULL, ®_v4_04, ssrS_bcpvec4, &ssr_frag_in.v4[4] }, - { sizeof(Vec4), NULL, ®_v4_05, ssrS_bcpvec4, &ssr_frag_in.v4[5] } + { sizeof(Vec4), NULL, ®_v4_05, ssrS_bcpvec4, &ssr_frag_in.v4[5] }, + { sizeof(Vec4), NULL, ®_v4_06, ssrS_bcpvec4, &ssr_frag_in.v4[6] }, + { sizeof(Vec4), NULL, ®_v4_07, ssrS_bcpvec4, &ssr_frag_in.v4[7] }, }; /*设置这个draw call开启的寄存器*/ void ssrS_openregs(uint varying_flag) { - if (varying_flag & VARYING_EXTRA == 0) + if (varying_flag & VARYING_ANY == 0) { open_regsi[0] = -1; return; } int j = 0; for (int i = 0; i < REG_TOTAL; ++i) { - if (varying_flag & VARYING_EXTRA == 0) + if (varying_flag & VARYING_ANY == 0) break; if (varying_flag & (1 << i)) { open_regsi[j++] = i; varying_flag &= ~(1 << i); } } - if(j < REG_TOTAL) + if (j < REG_TOTAL) open_regsi[j] = -1; } void ssrS_setactiveregr() { /*set active reg data from registers*/ int index = 0; - ActiveReg* reg; + ActiveReg* reg; for (int i = 0; i < REG_TOTAL; ++i) { index = open_regsi[i]; - if (index == -1) break; - reg = &active_regs[index]; + if (index == -1) break; + reg = &active_regs[index]; reg->data = registers[index].data; } } @@ -160,19 +184,19 @@ void ssrS_solveregs(Vec3* bc, uint a, uint b, uint c) { } /*计算基础属性的插值,并输出*/ -void ssrS_solveprops(uint varying_flag, Vec3* bc, Vert* A, Vert* B, Vert* C) { - if (varying_flag & VARYING_BASIC) { - if (varying_flag & VARYING_POSITION) ssrS_bcpvec3(bc, &A->position, &B->position, &C->position, &ssr_frag_in.position); - if (varying_flag & VARYING_NORMAL) ssrS_bcpvec3(bc, &A->normal, &B->normal, &C->normal, &ssr_frag_in.normal); - if (varying_flag & VARYING_TANGENT) ssrS_bcpvec3(bc, &A->tangent, &B->tangent, &C->tangent, &ssr_frag_in.tangent); - if (varying_flag & VARYING_TEXCOORD) ssrS_bcpvec2(bc, &A->texcoord, &B->texcoord, &C->texcoord, &ssr_frag_in.texcoord); -/* - if (varying_flag & VARYING_JOINT) ssrS_bcpvec4(&bc, &A->joint, &B->joint, &C->joint, &ssr_frag_in.joint); - if (varying_flag & VARYING_WEIGHT) ssrS_bcpvec4(&bc, &A->weight, &B->weight, &C->weight, &ssr_frag_in.weight); -*/ - if (varying_flag & VARYING_COLOR) ssrS_bcpcolor(bc, A->color, B->color, C->color, &ssr_frag_in.color); - } -} +//void ssrS_solveprops(uint varying_flag, Vec3* bc, Vert* A, Vert* B, Vert* C) { +// if (varying_flag & VARYING_BASIC) { +// if (varying_flag & VARYING_POSITION) ssrS_bcpvec3(bc, &A->position, &B->position, &C->position, &ssr_frag_in.position); +// if (varying_flag & VARYING_NORMAL) ssrS_bcpvec3(bc, &A->normal, &B->normal, &C->normal, &ssr_frag_in.normal); +// if (varying_flag & VARYING_TANGENT) ssrS_bcpvec3(bc, &A->tangent, &B->tangent, &C->tangent, &ssr_frag_in.tangent); +// if (varying_flag & VARYING_TEXCOORD) ssrS_bcpvec2(bc, &A->texcoord, &B->texcoord, &C->texcoord, &ssr_frag_in.texcoord); +// /* +// if (varying_flag & VARYING_JOINT) ssrS_bcpvec4(&bc, &A->joint, &B->joint, &C->joint, &ssr_frag_in.joint); +// if (varying_flag & VARYING_WEIGHT) ssrS_bcpvec4(&bc, &A->weight, &B->weight, &C->weight, &ssr_frag_in.weight); +// */ +// if (varying_flag & VARYING_COLOR) ssrS_bcpcolor(bc, A->color, B->color, C->color, &ssr_frag_in.color); +// } +//} /*给寄存器扩容(如果需要的话)*/ void ssrS_setregisters(int capacity) { @@ -185,7 +209,7 @@ void ssrS_setregisters(int capacity) { reg = ®isters[index]; data = reg->data; if (reg->length >= capacity) - continue; + continue; if (!data) data = (byte*)calloc(capacity * reg->element_size, sizeof(byte)); else @@ -197,7 +221,7 @@ void ssrS_setregisters(int capacity) { /*进入vert shader前设置寄存器指针到对应顶点的数据在寄存器中的位置*/ void ssrS_setupregisterpoints(int idx) { - ActiveReg* reg; + ActiveReg* reg; uint index; for (int i = 0; i < REG_TOTAL; ++i) { index = open_regsi[i]; diff --git a/src/core/shader.h b/src/core/shader.h index fd71f5a..f433f0e 100644 --- a/src/core/shader.h +++ b/src/core/shader.h @@ -4,7 +4,6 @@ #include "../math/math.h" #include "vert.h" #include "texture.h" -#include "clip.h" typedef struct { /*built in varaibles*/ @@ -32,26 +31,23 @@ typedef struct { #define UN(i) (&uniforms->var_num[i]) #define UU (uniforms->userdata) -typedef struct VertexShaderIn { +#define REG_TOTAL 32 +#define REG_NUM_COUNT 4 +#define REG_V2_COUNT 8 +#define REG_V3_COUNT 12 +#define REG_V4_COUNT 8 + +typedef struct { Vert* vertex; } VertexShaderIn; typedef void(*VertexShader)(UniformCollection* uniforms, VertexShaderIn* in, Vec4* homocoord); -typedef struct FragmentShaderIn { - /*value from vertices interpolation*/ - Vec3 position; - Vec3 normal; - Vec3 tangent; - Vec2 texcoord; - Color color; - Vec4 joint; - Vec4 weight; - /*value from registers interpolation*/ - float num[4]; - Vec2 v2[6]; - Vec3 v3[8]; - Vec4 v4[6]; +typedef struct { + float num[REG_NUM_COUNT]; + Vec2 v2[REG_V2_COUNT]; + Vec3 v3[REG_V3_COUNT]; + Vec4 v4[REG_V4_COUNT]; } FragmentShaderIn; typedef bool(*FragmentShader)(UniformCollection* uniforms, FragmentShaderIn* in, Color32* color); @@ -64,18 +60,6 @@ typedef struct { #define VARYING_NONE (0) -#define VARYING_POSITION (1u << 31) -#define VARYING_NORMAL (1u << 30) -#define VARYING_TANGENT (1u << 29) -#define VARYING_TEXCOORD (1u << 28) -#define VARYING_COLOR (1u << 27) -#define VARYING_JOINT (1u << 26) -#define VARYING_WEIGHT (1u << 25) - -#define VARYING_UNUSED (1u << 24) - -#define VARYING_BASIC ( VARYING_UNUSED | VARYING_POSITION | VARYING_NORMAL | VARYING_TANGENT | VARYING_TEXCOORD | VARYING_COLOR | VARYING_JOINT | VARYING_WEIGHT ) - #define VARYING_NUM_00 (1u) #define VARYING_NUM_01 (1u << 1) #define VARYING_NUM_02 (1u << 2) @@ -89,30 +73,38 @@ typedef struct { #define VARYING_V2_03 (1u << 7) #define VARYING_V2_04 (1u << 8) #define VARYING_V2_05 (1u << 9) - -#define VARYING_V2 (VARYING_V2_00 | VARYING_V2_01 | VARYING_V2_02 | VARYING_V2_03 | VARYING_V2_04 | VARYING_V2_05) - -#define VARYING_V3_00 (1u << 10) -#define VARYING_V3_01 (1u << 11) -#define VARYING_V3_02 (1u << 12) -#define VARYING_V3_03 (1u << 13) -#define VARYING_V3_04 (1u << 14) -#define VARYING_V3_05 (1u << 15) -#define VARYING_V3_06 (1u << 16) -#define VARYING_V3_07 (1u << 17) - -#define VARYING_V3 (VARYING_V3_00 | VARYING_V3_01 | VARYING_V3_02 | VARYING_V3_03 | VARYING_V3_04 | VARYING_V3_05| VARYING_V3_06| VARYING_V3_07) - -#define VARYING_V4_00 (1u << 18) -#define VARYING_V4_01 (1u << 19) -#define VARYING_V4_02 (1u << 20) -#define VARYING_V4_03 (1u << 21) -#define VARYING_V4_04 (1u << 22) -#define VARYING_V4_05 (1u << 23) - -#define VARYING_V4 (VARYING_V4_00 | VARYING_V4_01 | VARYING_V4_02 | VARYING_V4_03 | VARYING_V4_04 | VARYING_V4_05) - -#define VARYING_EXTRA (VARYING_NUM | VARYING_V2 | VARYING_V3 | VARYING_V4) +#define VARYING_V2_06 (1u << 10) +#define VARYING_V2_07 (1u << 11) + +#define VARYING_V2 (VARYING_V2_00 | VARYING_V2_01 | VARYING_V2_02 | VARYING_V2_03 | VARYING_V2_04 | VARYING_V2_05 | VARYING_V2_06 | VARYING_V2_07) + +#define VARYING_V3_00 (1u << 12) +#define VARYING_V3_01 (1u << 13) +#define VARYING_V3_02 (1u << 14) +#define VARYING_V3_03 (1u << 15) +#define VARYING_V3_04 (1u << 16) +#define VARYING_V3_05 (1u << 17) +#define VARYING_V3_06 (1u << 18) +#define VARYING_V3_07 (1u << 19) +#define VARYING_V3_08 (1u << 20) +#define VARYING_V3_09 (1u << 21) +#define VARYING_V3_10 (1u << 22) +#define VARYING_V3_11 (1u << 23) + +#define VARYING_V3 (VARYING_V3_00 | VARYING_V3_01 | VARYING_V3_02 | VARYING_V3_03 | VARYING_V3_04 | VARYING_V3_05| VARYING_V3_06| VARYING_V3_07 | VARYING_V3_08 |VARYING_V3_09 | VARYING_V3_10 | VARYING_V3_11) + +#define VARYING_V4_00 (1u << 24) +#define VARYING_V4_01 (1u << 25) +#define VARYING_V4_02 (1u << 26) +#define VARYING_V4_03 (1u << 27) +#define VARYING_V4_04 (1u << 28) +#define VARYING_V4_05 (1u << 29) +#define VARYING_V4_06 (1u << 30) +#define VARYING_V4_07 (1u << 31) + +#define VARYING_V4 (VARYING_V4_00 | VARYING_V4_01 | VARYING_V4_02 | VARYING_V4_03 | VARYING_V4_04 | VARYING_V4_05 | VARYING_V4_06 | VARYING_V4_07) + +#define VARYING_ANY (VARYING_NUM | VARYING_V2 | VARYING_V3 | VARYING_V4) Color* ssrS_bcpcolor(Vec3* bc, Color A, Color B, Color C, Color* out); float* ssrS_bcpnum(Vec3* bc, float* A, float* B, float* C, float* out); @@ -151,6 +143,9 @@ typedef struct { }; } Register; +typedef void* (*BcpInterpolator)(Vec3* bc, void* a, void* b, void* c, void* out); +typedef void* (*LinearInterpolator)(float t, void* a, void* b, void* c, void* out); + typedef struct { uint element_size; byte* data; /*mutable, either of registers or temp-registers*/ @@ -159,21 +154,15 @@ typedef struct { byte* output; /*fragment-in*/ } ActiveReg; -#define REG_TOTAL 24 -#define REG_NUM_COUNT 4 -#define REG_V2_COUNT 6 -#define REG_V3_COUNT 8 -#define REG_V4_COUNT 6 - Register registers[REG_TOTAL]; ActiveReg active_regs[REG_TOTAL]; uint open_regsi[REG_TOTAL]; /*draw call用到的寄存器,可以索引到registers和active_regs*/ /*寄存器指针accessor,指向寄存器中的某个值,用于在shader里快速访问,使用错误可能会出现野指针*/ float *reg_num_00, *reg_num_01, *reg_num_02, *reg_num_03; -Vec2 *reg_v2_00, *reg_v2_01, *reg_v2_02, *reg_v2_03, *reg_v2_04, *reg_v2_05; -Vec3 *reg_v3_00, *reg_v3_01, *reg_v3_02, *reg_v3_03, *reg_v3_04, *reg_v3_05, *reg_v3_06, *reg_v3_07; -Vec4 *reg_v4_00, *reg_v4_01, *reg_v4_02, *reg_v4_03, *reg_v4_04, *reg_v4_05; +Vec2 *reg_v2_00, *reg_v2_01, *reg_v2_02, *reg_v2_03, *reg_v2_04, *reg_v2_05, *reg_v2_06, *reg_v2_07; +Vec3 *reg_v3_00, *reg_v3_01, *reg_v3_02, *reg_v3_03, *reg_v3_04, *reg_v3_05, *reg_v3_06, *reg_v3_07, *reg_v3_08, *reg_v3_09, *reg_v3_10, *reg_v3_11; +Vec4 *reg_v4_00, *reg_v4_01, *reg_v4_02, *reg_v4_03, *reg_v4_04, *reg_v4_05, *reg_v4_06, *reg_v4_07; void ssrS_openregs(uint varying_flag); void ssrS_setactiveregr(); @@ -187,8 +176,6 @@ void ssrS_setupregisterpoints(int idx); /*设置寄存器指针,指向fragIn结构*/ void ssrS_setregtofragin(); -void ssrS_solveprops(uint varying, Vec3* bc, Vert* a, Vert* b, Vert* c); - #define tex2d(tex, uv) \ texture_sampling(tex, ssr_getfiltermode(), ssr_getwrapmode(), (uv).x, (uv).y) diff --git a/src/example/03_texture.c b/src/example/03_texture.c index fbd442a..50a96a1 100644 --- a/src/example/03_texture.c +++ b/src/example/03_texture.c @@ -115,11 +115,8 @@ void ondrawtexture(void*data) { ssr_bindvertices(yingham_mesh->vertices, yingham_mesh->verts_count, yingham_mesh->triangles, yingham_mesh->tris_count); ssr_draw(PRIMITIVE_TRIANGLE); - ssr_disable(ENABLE_BACKFACECULL); - ssr_setuniformtex(0, ground_albedo); ssr_bindvertices(ground_mesh->vertices, ground_mesh->verts_count, ground_mesh->triangles, ground_mesh->tris_count); ssr_draw(PRIMITIVE_TRIANGLE); - ssr_enable(ENABLE_BACKFACECULL); } diff --git a/src/shaders/default.c b/src/shaders/default.c index 00b436c..f184e27 100644 --- a/src/shaders/default.c +++ b/src/shaders/default.c @@ -27,7 +27,6 @@ static void vert(UniformCollection* uniforms, VertexShaderIn* in, Vec4* clipcoor static bool frag(UniformCollection* uniforms, FragmentShaderIn* in, Color32* color) { vec3_normalize(light, light); - vec3_normalize(&in->normal, &in->normal); float roughness = *rough; //(*color).r = 1; //(*color).g = 1; @@ -35,17 +34,12 @@ static bool frag(UniformCollection* uniforms, FragmentShaderIn* in, Color32* col //(*color).a = 1; //return 1; //float rough = 1- vec3_dot(&in->normal, light); - Color32 c = tex2d(maintex, in->texcoord); //Color32 nc = tex2d(noramltex, in->texcoord); //vec3_scale(&c, roughness, &c); - color32_saturate(&c); - *color = c; return 1; } Program ssr_built_in_shader_default = { vert, frag, - VARYING_TEXCOORD | - VARYING_NORMAL | VARYING_NUM_00 };
\ No newline at end of file diff --git a/src/shaders/pbr.c b/src/shaders/pbr.c index c154f02..3026cc7 100644 --- a/src/shaders/pbr.c +++ b/src/shaders/pbr.c @@ -10,6 +10,8 @@ #define metalness_tex UTEX(3) /*varyings*/ +#define uv reg_v2_00 +#define vnormal reg_v3_05 #define rough reg_num_00 #define world_pos reg_v3_00 #define depth_pos reg_v3_01 @@ -29,20 +31,22 @@ static void vert(UniformCollection* uniforms, VertexShaderIn* in, Vec4* clipcoor }; Vec4 worldnormal; mat4_mulvec4(object2world, &normal, &worldnormal); vec3_normalize(light, light); - *rough = 1 - vec3_dot(&worldnormal, light); + //*rough = 1 - vec3_dot(&worldnormal, light); + //*vnormal = in->vertex->normal; + *uv = in->vertex->texcoord; } static bool frag(UniformCollection* uniforms, FragmentShaderIn* in, Color32* color) { - vec3_normalize(light, light); - vec3_normalize(&in->normal, &in->normal); - float roughness = *rough; + //vec3_normalize(light, light); + //vec3_normalize(vnormal, vnormal); + //float roughness = *rough; //(*color).r = 1; //(*color).g = 1; //(*color).b = 1; //(*color).a = 1; //return 1; //float rough = 1- vec3_dot(&in->normal, light); - Color32 c = tex2d(albedo_tex, in->texcoord); + Color32 c = tex2d(albedo_tex, *uv); //Color32 nc = tex2d(noramltex, in->texcoord); //vec3_scale(&c, roughness, &c); color32_saturate(&c); @@ -52,14 +56,13 @@ static bool frag(UniformCollection* uniforms, FragmentShaderIn* in, Color32* col Program ssr_built_in_shader_pbr = { vert, frag, - VARYING_TEXCOORD | - VARYING_NORMAL | - VARYING_NUM_00 | - VARYING_V3_00 | - VARYING_V3_01 | - VARYING_V3_02 | - VARYING_V3_03 | - VARYING_V3_04 | - VARYING_V4_00 + //VARYING_V3_00 | + //VARYING_V3_01 | + //VARYING_V3_02 | + //VARYING_V3_03 | + //VARYING_V3_04 | + //VARYING_V4_00 | + VARYING_V2_00 | + VARYING_V3_05 };
\ No newline at end of file diff --git a/src/shaders/unlit.c b/src/shaders/unlit.c index 59510dd..9a807af 100644 --- a/src/shaders/unlit.c +++ b/src/shaders/unlit.c @@ -24,19 +24,10 @@ static void vert(UniformCollection* uniforms, VertexShaderIn* in, Vec4* clipcoor static bool frag(UniformCollection* uniforms, FragmentShaderIn* in, Color32* color) { vec3_normalize(light, light); - vec3_normalize(&in->normal, &in->normal); - //float rough = 1- vec3_dot(&in->normal, light); - float roughness = *reg_num_00; - Color32 c = tex2d(maintex, in->texcoord); - //vec3_scale(&c, roughness, &c); - //color32_saturate(&c); - *color = c; return 1; } Program ssr_built_in_shader_unlit = { vert, frag, - VARYING_TEXCOORD | - VARYING_NORMAL | VARYING_NUM_00 }; |